Projects
A selection of chip design and hardware projects spanning analog IC, digital ASIC, FPGA, and custom physical design.
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Mini Stereo Digital Audio Processor (MSDAP) ASIC
Spring 2026Software/hardware co-design of a custom ASIC performing multiplier-less PoT convolution — 2x efficiency gain. Full spec-to-GDSII flow on 7nm standard-cell process. DRC/LVS clean, timing closure clean, LEC clean. 20k cells, 30 MHz clock, 0.0299 mW dynamic power, 0.1255 mW leakage. Included CTS, ECO flow, STA, and post-APR verification.
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128b 7nm S2P & Custom Cell Library
Spring 2026Custom physical cell design in 7nm FinFET technology using the ASAP7 PDK. Built a full custom cell library with manual place and route and custom floorplanning. Implemented structural Verilog and validated the full design.
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16-bit SAR ADC Controller
Fall 2025Designed a 16-bit successive approximation register (SAR) ADC controller in Verilog, coordinating DAC trial bit sequencing, comparator input capture, and end-of-conversion logic. Multi-channel pipeline control architecture for increased throughput. Synthesized netlist with 3,200 custom cells on GlobalFoundries 65nm process. DRC and LVS verified.
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FP8 MAC Unit
Fall 2025Designed and verified an FP8 multiply-accumulate (MAC) unit using SystemVerilog with a full UVM testbench. Synthesized and validated on Xilinx Vivado targeting FPGA.
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Designed a two-stage differential amplifier with current mirrors and Miller compensation. Supply: 1.5V, load: 2pF. Achieved 76.96 dB voltage gain, 1.217V swing, 5.65 V/µs slew rate, 70.86 dB CMRR, 6.91 MHz unity-gain frequency, 61.19° phase margin, and only 0.0874 mW power dissipation.
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Autonomous Environmental Scanning and Mapping Rover
Fall 2023Designed and implemented embedded firmware for low-level peripheral control (I²C, SPI, UART) to acquire sensor data from LIDAR and IMU units. Developed real-time C++ algorithms for navigation and obstacle avoidance, processing LIDAR data to construct and live-stream a 3D point cloud map of the environment. Integrated a wireless inductive charging circuit for autonomous charging.
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Developed a novel indoor/GPS-denied navigation system as part of a published research project at UT Dallas. The system reinvents positioning for environments where GPS is unavailable — featured by the UTD ECE department. Patent pending; journal publication forthcoming in 2026.
