About

I'm an Electrical Engineer pursuing my MSEE at the University of Texas at Dallas (GPA 3.9, expected Dec 2026), with a focus on VLSI and ASIC design. My work spans the full chip design flow — RTL coding, synthesis, place-and-route, static timing analysis, and physical verification.

Outside of coursework, I've contributed to NIH-funded geolocation research, co-authored a patent on a novel navigation algorithm, and interned at Texas Instruments working on safety-critical automotive firmware.

View Resume (PDF)

Education

University of Texas at Dallas Richardson, TX

M.S. Electrical Engineering — Expected Dec 2026 · GPA 3.9/4.0

B.S. Electrical Engineering — May 2024

Relevant courses: Advanced VLSI Design, ASIC Design, Analog IC Design, Hardware Modeling using HDL

Work Experience

Texas Instruments Sugarland, TX

Applications Engineering Intern · May 2026 – Aug 2026

Engineered an AI-assisted C2000 MCU code-generation framework by parsing TI SDK source and examples into structured Markdown context for agents in Code Composer Studio integration, reducing MCU configuration development time from 3 weeks to 3 days (~86%).
Ported and validated real-time AC/DC and DC/DC digital power control for an onboard charger reference design (TIDM-02013) from F28x to F29x, achieving functional hardware operation and verifying high resolution PWM waveforms, Trip Zone protection, and safety ISRs.

University of Texas at Dallas Richardson, TX

Signals & Systems Research Engineer · Jan 2024 – Jul 2025

Developed RF propagation maps for geolocation solutions by processing TDoA and RSS data.
Collaborated with an international team and the National Institute of Health (NIH) on a geolocation study in Uganda.
Led design of a novel geolocation algorithm using a modified Dijkstra's approach — resulted in a patented invention.

Mouser Electronics Mansfield, TX

Applications Engineering Intern · Jun 2022 – Aug 2022

Designed and prototyped an automated air ventilation system using I²C and UART for sensor integration and motor control.
Researched and tested application use-cases for semiconductor products, documenting performance and feasibility.

Technical Skills

HDL & Programming

VerilogSystemVerilogUVMC/C++

ASIC / RTL-to-GDSII

Design VisionGenusInnovus PrimeTimeTempusDRC/LVS

EDA & Simulation

Cadence VirtuosoModelSimHSPICE MATLAB/SimulinkXilinx Vivado

Publications & Patents

I-NAV: Inverse Navigation for Questionnaire-Based Geolocation in GPS-Denied Environments

Under IEEE Review · Aug 2025

Developed a novel geolocation algorithm modifying Dijkstra's algorithm to generate isochrones for improved positioning in GPS-denied environments.

Get in touch

Feel free to reach out at justin.alejandro.2000@gmail.com.